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With the increasing complexity of highly integrated system on chips (SoCs), the power management system (PMS) is required to provide several power supplies efficiently for individual blocks. This paper presents a single-inductor multiple outputs (SIMO) an inductor-first hybrid converter that generates three outputs between 0.4V and 1.6V from a 1.8V input. The proposed multiple-output hybrid power stage can improve the conversion efficiency by reducing inductor current while extending the output voltage range compared with the existing hybrid topologies. In addition, the proposed converter employs an on-chip switched-capacitor power stage (SCPS) with a dual switching frequency technique, resulting in a fast response time, low cross-regulation, and reduced number of on-chip pads. Measurement results show that the converter achieves a peak efficiency of 87.5% with a maximum output current of 450mA. The converter is integrated with a fast voltage regulation loop with a 500MHz system clock to achieve less than 0.01mA/mV cross-regulation and a maximum 20mV overshoot at full-load transient response. The design is fabricated in the standard 180nm CMOS technology 

To improve the power delivery in System-on-Chips (SoCs), this paper proposes a single-input-multi-output (SIMO) hybrid converter to obtain fast response time, low cross-regulation, and 87% peak efficiency by using a multi-output hybrid power stage and dual-switching-frequency technique. The multiple-output hybrid power stage improves the conversion efficiency without sacrificing the output voltage range, and the dual-switching-frequency technique enhances the response time and cross-regulation performance. The proposed SIMO hybrid converter achieves 87.5% peak efficiency with an output voltage range from 0.4V to 1.6V for all outputs and a total maximum load current of 450mAAdditionally, it achieves less than 0.01mA/mV cross-regulation and less than 20mV overshoot at full-load step transient response. 

To mitigate large voltage droop caused by sub-ns dynamic current transitions in system on chips (SoCs), this paper proposes a fully integrated analog-assisted inverter-based digital low dropout regulator (LDO) to obtain a fast response time with 160mV droop at 25mA/100ps featuring 99.4% current efficiency, and 16mV DC load regulation in sub-1V operating range by using a dynamic-step quantizer and a trip-point controller. The proposed quantizer is implemented with an inverter-based flash ADC to achieve high speed without consuming large power while the trip-point controller corrects the DC error of the inverter-based ADC. Besides, the assistant analog LDO is employed to provide fine-grain regulation and remove ripple from the output voltage.